Un convertitore ADC promettente per l'SDR

Nei moderni ricevitori SDR a ccampionamento diretto i limiti di copertura di banda sono legati ai lenti sviluppi tecnologici nel campo dei convertitori analogico-digitali utilizzati per acquisire le ampie finestre di banda che vengono successivamente date in pasto agli algoritmi di downconversion (da cui si ricava la banda base da immettere a sua volta stati di DSP incaricati della demodulazione software). Analog Devices annuncia ora un prodotto, l'AD9467, definito come il convertitore a 16 bit di precisione con il maggior tasso di campionamento (250 MSPS) e il minor consumo oggi sul mercato. Le specifiche di questo componente per applicazioni di acquisizione IF molto elevate - in modo di ridurre il numero di stadi di downconversion - parlano di input analogico a 300 MHz. iIl prezzo, per volumi di mille, è di 120 dollari. Non indifferente. Una evaluation board ne costa 300. Il datasheet è disponibile qui mentre i dettagli del comunicato si trovano qui.

ANALOG DEVICES ANNOUNCES INDUSTRY’S FASTEST 16-BIT ADC AT 250 MSPS

- ADI continues to set converter performance standard with new AD9467; enables advances in radar systems, spectrum analyzers and multi-carrier, multi-mode receiver designs for wireless infrastructure.

Norwood, MA (09/27/2010) - The industry’s fastest 16-bit ADC (analog-to-digital converter)--at 250 MSPS (mega samples per second)--was unveiled today by data converter market share leader Analog Devices, Inc. The AD9467 16-bit, 250 MSPS ADC operates on 35% less power at 25% higher sampling rate than any other 16-bit data converter, providing a new level of signal processing performance for test and measurement instrumentation, defense electronics, and communications applications where high resolution over a wide bandwidth is needed. The AD9467 delivers resolution and a fast sample rate while simultaneously achieving a high SFDR (spurious-free dynamic range) of up to 100 dBFs and SNR (signal-to-noise ratio) performance of 76.4 dBFS. The device’s SFDR of 90 dBFS up to 300 MHz analog input and 60-femtosecond rms (root mean square) jitter helps lower the signal chain bill of materials component count by allowing engineers to increase system performance at higher intermediate frequencies, thereby reducing the number of signal down-conversion stages.

AD9467 16-bit, 250 MSPS ADC Key Features and Benefits:

- 16-bit resolution with high signal bandwidths up to 300 MHz enables advanced signal acquisition subsystems in common radio platforms, radar systems, and spectrum analysis.

- On-chip IF (intermediate frequency) sampling circuit and buffered analog inputs optimize the AD9467 for the highest ENOB and ease of use.

- High dynamic range over broad signal bandwidth enables software-defined radios for use with multiple standards, such as LTE/W-CDMA, MC-GSM (class 1) and CDMA.

- Programmable full-scale input range allows trade-off between SNR and SFDR enabling the design of more sensitive radar systems with the ability to acquire and track smaller targets with better accuracy.